Use Wafer Mapping In The Manufacturing of Integrated Circuit

A wafer map is used to identify the locations of defective integrated circuits (chips) on a silicon wafer and get spatial information about it. The parameter used to measure the process quality of wafer cassette mapping is wafer yield but many other features are accounted as well.

Kensington Labs does careful analysis to address the spatial information in the wafer map for monitoring the quality of the manufacturing process, and eliminate the fault sources. A simple analysis of wafer map data and formal statistical is done to see the different spatial patterns. Usually, the faults are distributed non-uniformly across the wafer, and the fault probability varies across the wafer, to allow faults at adjacent locations to be statistically dependent on each other.

Wafer Cassette Mapping- A Brief Description

Wafer maps provide vital information for identifying the root cause of errors or failure through the semiconductor manufacturing processes. Numbers of methods are used to classify the wafer map defect pattern and image retrieval but a convolution neural network (CNNs) is the most preferred one.

Thousands of synthetic wafer maps are generated theoretically for defect classes and subsequently used for CNN training, validation, and testing. The overall classification accuracy is about 98.2% which is determined after one thousand real wafer maps for CNN performance evaluation by synthetic wafer maps. For network training, only synthetic data is used to make sure that real wafer maps are classified with high accuracy. For image retrieval, a binary code is generated for each wafer mapping from an output of a fully connected layer with sigmoid activation.

There are many studies for wafer cassette mapping pattern recognition and the classification is divided into two main groups’ namely model-based pattern recognition, and feature extraction-based pattern recognition.

• The model-based pattern recognition is used for a predefined probability distribution function for each defect pattern and selecting the best matching model considering the Akaike information criterion (AIC) and the Bayesian information criterion (BIC).
• The feature extraction-based pattern recognition is used for extracting the pattern features using correlogram and Radon transform techniques. After the extraction of pattern features, the vector machines, neural networks, nearest neighbors, etc. are the common pattern classification algorithms applied for the classification task and further function.

Deep convolution neural network (CNN) is the most advanced state-of-the-art image classification performance and a standard approach for image classification tasks. CNN is the end-to-end model for task-specific feature engineering. The end-to-end model approach is good for developing task-specific feature extractors without the need for domain-specific export knowledge.

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